Efficient Sub-band Coder Implementation for Portable Low-power Applications

This paper presents a low-power co-processor designed for power-efficient, real-time mono and stereo Weighted Overlap-Add (WOLA) filterbank processing. The filterbank easily interfaces to general-purpose DSP processors as a co-processor and provides high fidelity filterbank processing with low group delay for a wide range of applications. The co-processor architecture is very flexible and generates from 4 up to 128 complex channels. It is implemented in a 0.35 um CMOS five-layer metal technology. The chip size is less than 8 mm, which is very small compared to standard DSP processor chips. Additionally, the power consumption is only 250 μA with a power supply of 1 volt. The co-processor has also been targeted to a 0.18 um CMOS four-layer metal technology for use in digital hearing aids where it provides the flexibility required to support advanced algorithms while meeting the ultra low-power requirements of this application.